Electronic switching apparatus



March 8, 1966 s. G. FRANCISCO ELECTRONIC SWITCHING APPARATUS OriginalFiled June 30, 1958 2 Sheets-Sheet 1 FIG.

ANALOG OUTPUT ANALOG REFERENCE VOLTAGE IG 2b INVENTOR Sherman 61Francisco ATTORNEY March 8, 1966 s. G. FRANCISCO 3,239,831

ELECTRONIC SWITCHING APPARATUS Original Filed June 30, 1958 2Sheets-Sheet 2 DIFFERENTIATING 32 40 MEANS ANALOG OUTPUT VOLTAGE 39 +dco T M FIG; 3

United States Patent 3,239,831 ELECTRONIC SWITCHING APPARATUS Sherman G.Francisco, Portolo Valley, Calif., assignor to International BusinessMachines Corporation, New

York, N .Y., a corporation of New York Original application June 30,1958, Ser. No. 745,432, now Patent No. 3,076,938, dated Feb. 5, 1963.Divided and this application Dec. 27, 1960, Ser. No. 78,559

2 Claims. (Cl. 340347) This invention relates to an improvement indigital-toanalog conversion circuitry and more particularly to a new andimproved high-speed and accurate conversion system which is applicableto both alternating current and direct current analog systems. This is adivisional application of co-pending application Serial Number 745,432,filed June 30, 1958, now Patent No. 3,076,938, entitled ElectronicSwitching Apparatus, inventor-Sherman G. Francisco, and assigned to thesame assignee as the present invention.

In the electronic computer field, it is often desired to communicatebetween computers or portions thereof utilizing digital information toanother computer or portion thereof utilizing analog information, orvice versa. It is the means for conversion of digital information foruse in an analog computer system with which the present invention isparticularly concerned. As is well known, analog systems may be ofeither the direct current type where the magnitude of a voltagerepresents the magnitude of the computer quantity, and its polarityrepresents the sign of that computer quantity; or of the alternatingcurrent type where the ratio of the magnitude of the signal voltage withrespect to a reference voltage represents the computer quantity, and thephase of the signal voltage with respect to the phase of the referencevoltage represents the sign of that computer quantity.

In the prior art, electronic digital-to-analog conversion techniquesoften lack a high degree of accuracy with the result that thecommunication between digital and analog computation elements isseriously impaired. One technique known in the prior art is toselectively energize each of a plurality of digitally weighted, i.e.,binary, summing resistors through a mechanical single pole double throwtype switch so that an analog reference voltage is applied to one of thecontacts, while a signal reference source (such as signal ground) isapplied to each of the other contacts. Although this technique providesa high degree of accuracy, the use of a mechanical single pole doublethrow switch limits the application to digital conversion speeds muchbelow those often desired in present day applications.

Another technique known in the prior art is to selectively energize eachinput of a digitally weighted summing resistor lattice through a seriestype electronic switch which effectively acts as a constant currentgenerator in accordance with the digital information being converted.While this technique is of the electronic type and operates at highspeeds, it results in considerable electrical circuitry to provide eachconstant current generator and switch combination and is particularlyundesirable in View of the fact that the technique does not lend itselfto the use of an alternating current analog reference voltage. As aresult, this conversion is limited to digital-to-direct current analogapplications.

This limitation is significant when it is pointed out that thealternating current analog computer has wide use, particularly in thefields of industrial automation and airborne navigation and bombingdevices. For example, it is presently considered a highly desirabledevelopment technique to use an analog computer to simulate a controlsystem while under development in combination with a digital computer tosimulate the practical control prob- 3,239,831 Patented Mar. 8, 1966lems with which the proposed control system will be designed to operate.As the portions of the control system are completed, they aresubstituted for the appropriate element or elements in an analogcomputer for purposes of checking their design and performance, therebyadvancing the design of the individual elements rather than delayingsystem tests until all working elements are arranged in the workingcombination.

It is, therefore, a primary object of the present invention to provide anew and improved high speed and accurate digital-to-analog conversionsystem which is applicable to both alternating current and directcurrent analog systems.

Other objects of the invention will be pointed out in the followingdescription and claims and illustrated in the accompanying drawingswhich disclose, by way of eXam ples, the principle of the invention andthe best mode which has been contemplated of applying that principle.

In the drawings:

FIG. 1 shows an electrical block diagram of a digital-toanalog converteraccording to the present invention to provide for accurate operation athigh speeds in both AC. and DC. analog systems;

FIG. 2a shows an electrical diagram of an idealized electrical switch;

FIG. 2b shows an electrical diagram of a conventional clamp circuit usedas a switch;

FIG. 20 shows a diagram of an equivalent electrical circuit of anelectuonic switch; and

FIG. 3 shows an electrical schematic of a preferred embodiment of anelectronic switch.

The present invention relates to a new and improved digital-to-analogconversion technique which is operable with both alternating current anddirect current analog systems.

Briefly, a reference voltage of one phase or the other (or of onepolarity or the other, depending upon the type of analog system) isapplied through parallel summing resistance paths (one for eachsignificant digit) to the input of a summing amplifier with the summingresistance paths having digitally weighted resistance values inaccordance with the particular digital code se lected. The electronicswitching means are then provided to ground or isolate (with referenceto a signal ground) each summing resistance path according to themagnitude of the digital quantity desired to be inserted as an analogquantity into the analog system. The electronic switch, which will bedescribed in considerable detail hereinafter in connection with FIGS. 2and 3, is connected in parallel with a portion of each summingresistance path in a manner such that it may determine whether or notthe reference voltage being applied to each summing resistance pathcontributes to the input of a summing amplifier in accordance with itsopen or closed condi-tion. The electronic switch has a bistableoperation with a very low, effective resistance during the closed switchmode of operation corresponding to one condition and a very highresistance during the open switch mode of operation. Because thebistable electronic switch can maintain a terminal at substantially asignal ground voltage level during one of its stable conditions wheneither an AC. or DC. reference voltage is being applied and isolate theterminal from the signal reference during the other stable condition, auniversal high-speed, digital-to-analog converter may be constructed tooperate with a high degree of accuracy which is compatible with both AC.and DC. analog systems.

Referring to FIG. 1, an AC. reference voltage is applied to inputterminal 5 for application to summing amplifier 6 over two parallelpaths. The first path consists of summing resistor 7; and the secondpath includes summing resistor 3, summing amplifier 9, feedback resistor10, summing resistor 11 and summing resistor 12. Assuming that summingresistor 7 applies an A.C. reference voltage of a first phase directlyto summing amplifier 6, an identical voltage will be applied throughsumming resistor 8 to summing amplifier 9. If summing amplifier 9 has afeedback resistor 10 of a magnitude equal to twice that of resistor 8,amplifier 9 will provide an output voltage commensurate with twice thereference voltage and reversed in phase. This ouput voltage is thenapplied through summing resistors 11 and 12 to summing amplifier 6 inparallel with its other input voltage to derive an output voltagetherefrom commensurate with the algebraic sum of the two input voltages.The magnitude of the resistances of each of resistors 11 and 12 is equalto one-half of the magnitude of resistors 7 and 13.

Accordingly, the voltage appearing at terminal 1 will be equal to thereference voltage with a first phase. On the other hand, if it isdesired that the reference voltage be of the reversed phase, anelectronic switching means 4 may be utilized to ground the junction ofsumming resistors 11 and 12, thereby grounding that input voltage to thesumming amplifier 6. As a result, the voltage appearing at terminal 1will be modified to be equal to the reference A.C. voltage with areversed phase. The operation and functional relationship of the summingresistors and amplifiers are the same for a D.C. reference voltage beingapplied to terminal as for an A.C. reference voltage, except thatpolarity replaces phase as the parameter providing the measure of sign.Alternating current and direct current summing amplifiers, which willwork satisfactorily in the manner described herein in connection withFIG. 1, are well known to those skilled in the art.

In order to provide a high degree of accuracy for both an A.C. or a D.C.analog system, switch 4 may be of the electronic switch type. Thevoltage at terminal 1, whether A.C. or D.C., may then be applied tosumming amplifier 2 via any of the parallel summing resistance pathsshown with each corresponding to an order of significance of the digitalinformation being inserted into the analog system. The summingresistance path corresponding to the highest order of significance isshown consisting of resistors 15 and 16 having their common terminalsconnected to signal ground through electronic switch 4. The summingresistance path corresponding to the next lower order of significancecomprises resistors 17 and 18 having their common terminals connected tosignal ground through an electronic switch 4. The summing resistancepath corresponding to the next lower order of significance comprisesresistors 19 and 20 having their common terminals connected to groundthrough an electronic switch 4. There will be a summing resistance pathfor each digital order of significance utilized to define the digitalcomputer information which it is desired to convert and insert into theanalog system. Therefore, the number of summing resistance paths usedobviously will be a matter of choice depending upon the particulardesign considerations. Summing amplifier 2 is shown having aconventional feedback resistor 21.

When all of the switches 4 are in the closed condition, as shown, thevoltage input to summing amplifier 2 will be equal to zero (signalground) since the reference voltage being applied through terminal 1 foreach of the summing resistances is then grounded through the respectiveresistors 16, 18, 20, etc. However, if the switches 4, connected to eachparallel summing resistance path, are selectively opened in accordancewith the instantaneous digital input information and if the totalresistance magnitude in each summing resistance path is appropriatelyweighted in accordance to the radix of the digital code being used, thesum of the voltage being applied to summing amplifier 2 will have amagnitude and phase commensurate with the instantaneous analogrepresentation of the digital input. An exemplary binary weighing wouldbe to make resistors 15 and 16 equal to 1R, each resulting in a totalresistance for that path equal to 2R, making resistor 17 equal to 3R andresistor 18 equal to IR, resulting in a total resistance for that pathequal to 4R, making resistor 19 equal to TR and resistor 20 equal to IR,resulting in a total resistance for that path equal to SR. If additionalsumming resistance paths are used for digital information withadditional orders of significance, the resistance values of eachadditional path should be selected according to the exemplifiedweighing. As a result, FIG. 1 idealistically appears to provide acomparatively simple means for converting and inserting a digitalquantity into an analog computer system.

However, as indicated above, problems arise relating to the selection ofthe particular construction of the switch 4 which is placed in each ofthe summing resistance paths and in the input to summing amplifier 6 toprovide for a phase (or polarity) reversal of the reference voltage.Referring to FIG. 20, there is shown an ideal switch for an electricalcircuit. It is ideal in its operating characteristic inasmuch as it actsas an infinite resistance (12:00) to the electrical circuit when it isopen and a very small or Zero resistance (R=0) when it is closed. Suchan ideal switch operation can be obtained from many well knowncommercially available mechanical electrical switches. The use of suchan ideal mechanical switch in the di-gital-to-analog conversion shown inFIG. 1 will result in a highly accurate operation because of the closetolerance which may be obtained in the scaling of the parallelresistance paths for each order of significance during both the openswitch and closed switch modes of operation. However, as suggestedhereinabove, the use of mechanical switching significantly restricts thespeeds at which the digital information may be converted and inserted inthe analog computer system. One solution to this problem has been tosubstitute an electronic clamp circuit which will act as a switch foreach of the mechanical switches. Such a clamp circuit is electricallyrepresented as shown in FIG. 2b.

Although the electronic clamping circuit in FIG. 2b will exhibit a verylarge and substantially infinite resistance (R.= during it open switchcondition, it will have a significant resistant (R=Rc) corresponding tothe internal conduction resistance of the electronic devices in theclamping circuit during the closed switch mode of operation. As a resultof this significant resistance Re, the use of the conventionalelectronic clamping circuit for each of the plural electronic switchingmeans 4 in the digital-to-analog converter of FIG. 1 will render thescaling of the parallel of the parallel summing resistance pathsinaccurate by a variable amount depending upon the number and therespective order of significance of the parallel path in which theclosed switches located. It is emphasized that the particular switcheswhich will be in the closed switch mode of operation will be variable inaccordance with the instantaneous digital information being converted.This limitation is especially important because a digital computer byits nature may be a high accuracy device and will usually be used inconjunction with an analog computer for this particular quality. If theconversion of the digital information and its insertion in an analogcomputer system results in inaccuracies, the benefits accruing to thetechnique will be greatly reduced. If a bistable electronic switch asdescribed were utilized as plural switches 4 of FIG. 1, this accuracyproblem would be greatly diminished in addition to having an importantadvantage of making the conversion technique usable for both A.C. andD.C. computer systems.

Such an electronic switch is shown in abbreviated equivalent electricaldiagram form in FIG. 2c and will be described hereinafter inconsiderable detail in connection with FIG. 3. In FIG. 2c, Rc representsthe internal resistance of the electronic devices in the switchingcircuit during conduction corresponding to the closed switch mode ofoperation, while Eg represents an equivalent voltage source which is, inturn, connected to monitor the voltage level of the output terminal 30via its control circuit. As a result of this monitoring, the resistanceof the circuit, which would ordinarily be equal to Re when the switch isin its closed switch mode of operation, is reduced by the feedbackprovided from the output terminal 30 to the control circuit equivalentgenerator Eg. Such a technique, per se, is well known in feedbackamplifier design where it is desired to reduce the amplifier resistance.However, in the present equivalent circuit, further switch means areprovided to isolate the output terminal of FIG. 20 from theequivalentgenerator Eg during the open switch mode of operation. It isthe combination of these features with which the teachings of thepresent invention are concerned.

Referring now to FIG. 3, there is shown a preferred embodiment of theelectronic switch having an electrical equivalent which is shown in FIG.20. Therein, terminal 30 represents the output terminal which it isalternately desired to connect to a signal reference and isolate from asignal reference source. This signal reference is shown in FIG. 3 assignal ground. During the closed switch mode, it is desired to maintainthe output terminal at signal ground level; while during the open switchmode, it is desired to isolate the output terminal from ground. Asindicated hereinabove, the bistable electronic switch shown in FIG. 3may be utilized for each switch 4 shown in the digital-to-analogconverter of FIG. 1. Because it is desired that FIG. I operate foreither AC. or DC. digital-to-analog conversion systems, it is importantthat the bistable electronic switch be able to continuously andbidirectionally modify the voltage level of terminal 30 to correspondwith signal ground during the closed switch mode of operation.

Referring to the details of FIG. 3, terminal 30 is shown connected tothe control grid of a cathode follower 31; and the signal referencesource, shown herein as signal ground, is connected to the control gridof another cathode follower 32. The plate of cathode follower 31 isconnected to a positive D.C. supply voltage, and its cathode isconnected to a negative DtC. supply voltage through cathode resistors 33and 58. Likewise, the plate of cathode follower 32 is shown connected toa positive D.C. supply voltage, while its cathode is shown connected toa negative D.C. supply voltage through cathode resistors 34 and 59. Theoutput of cathode follower 32 is shown taken from they cathode andapplied to the control grid of a voltage amplifier 37 through a.parallel connection of a current limiting resistor 35- and a capacitor36 for improving rise and fall times. The cathode of voltage amplifier37 is connected to the cathode of cathode follower 31 by a steeringdiode 38, and the plate of voltage amplifier 37 is connected to theplate of cathode follower 31 through resistor 39. As will be describedmore fully hereinafter, steering diode 38 is oriented to be forwardlybiased (based on conventional current flow) during the closed switchmode of operation so that the output voltage of voltage amplifier 37represents any differential between the output voltage of cathodefollower 31 corresponding to the voltage level of output terminal 30with respect to the output of cathode follower 32 corresponding to thevoltage level of signal ground. Resistor 53 provides a positive cathodebias for voltage amplifier 37.

Likewise, the cathode of cathode follower 31 is connected to the controlgrid of the voltage amplifier 40 through a parallel combination of agridcurrent limiting resistor 41 and a capacitor 42 for improving riseand fall brator. may be considered to correspond to the closed switchtimes. The cathode of voltage amplifier 40 is connected to the cathodeof cathode follower 32 through steering diode 43, and the plate ofvoltage amplifier 40 is connected to the plate of cathode follower 32via resistor 44. As will be described more fully hereinafter, steeringdiode 43 is oriented to be forwardly biased during the closed switchmode of operation so that the output voltage of voltage amplifier 40represents any differential between the output voltage of cathodefollower 32 corresponding to the voltage level of signal ground withrespect to the output of cathode follower 31 corresponding to thevoltage level of output terminal 30. Resistor 59 provides a positivecathode bias for voltage amplifier 40.

Output terminal 30 is also connected to the junction of the cathode ofan isolating diode 45 and the plate of voltage amplifier 46. The cathodeof voltage amplifier 46 is connected to the negative D.C. supplyvoltage, while the plate of isolating diode 45 is connected throughresistor 66 to the cathode of cathode follower 47 having a plate whichis connected to a positive D.C. supply voltage. The cathode of cathodefollower 47 is also connected to the negative D.C. supply voltagethrough a cathode load resistor 56. As connected, voltage amplifier 46,isolating diode 45 and cathode follower 47 form a voltage divider whichoperates in a manner such that the conduction of either cathode follower47, voltage amplifier 46, or both, may be controlled to vary the voltagelevel of the output terminal 30. As shown, the plate of voltageamplifier 40 is connected to the control grid of cathode follower 47 viaa parallel combination of grid current limiting resistor 48 and speed-upcapacitor 49, while the plate of voltage amplifier 37 is connected tothe control grid of voltage amplifier 46 via a parallel combination ofgrid current limiting resistor 50 and speed-up capacitor 65. The biasfor the biasing control grid of cathode follower 47 is supplied from anegative bias supply voltage through biasing resistor 52, and the biasfor the control grid of voltage amplifier 46 is provided by a negativebiasing voltage through biasing resist-or 53.

When steering diodes 38 and 43 are forwardly biased, the voltage outputfrom voltage amplifier 40 controls the conduction of cathode follower47, and the voltage output from voltage amplifier 37 controls theconduction of voltage amplifier 46 so that the voltage at outputterminal 36 may be bidirectionally controlled to tend to be maintainedequal to signal ground. It is the bidirectional control of the voltagelevel output terminal 30 that enables the electronic switch of FIG. 3 tomaintain the scaling accuracy of the digit-al-to-analog conversioncombination of FIG. 1 for either AC. or D.C. analog systems.

As shown, the cathode of voltage amplifier 40 is connected to thecathode of cathode follower 47 via t3. steering diode 54, and thecathode of voltage amplifier 37 is connected to the cathode of cathodefollower 47 through steering diode 55. Because the cathodes of cathodefollower 47 and voltage amplifier 40 are tied together and thep late ofamplifier 40 is connected to the control grid of cathode follower 47,they form what is known to those skilled in the art as a cathode coupledbistable multivi- One stable state of this bistable multivibrator modeof operation, and the other stable state may be considered to correspondto the open switch mode of operation. Moreover, voltage amplifier 37 isconnected to follow voltage amplifier 40 from one stable state to theother.

During the bistable condition corresponding to the closed switch mode ofoperation, voltage amplifier 40 is in a normal conducting state, whilecathode follower 47 is in a hard conducting state. Voltage amplifier 37,which is connected to follow voltage amplifier 40, is also in its normalconducting state. During this condition, the cathode-s of voltageamplifiers 40 and 37 are at approximately zero volts. Since biasingresistors 56 and 66 were selected so that the cathode of cathodefollower 47 was slightly positive during hard conduction, steeringdiodes 54 and 55 will be reversely biased during the correspondingclosed switch mode of operation. On the other hand, steering diodes 38and 43 will be forwardly biased. Moreover, whenever output terminal 30deviates from the signal ground voltage level, the voltage level of thecathode of cathode follower 31 will vary with respect to the voltage ofthe cathode of cathode follower 32, and the conduction of voltageamplifiers 40 and 37 will be increased or decreased in push-pullrelationship with one another in accordance with the instantaneousmagnitude and direction of that deviation. Accordingly, voltageamplifier 40 will vary the hard conduction of cathode follower 47, andvoltage amplifier 37 will modify the conduction of voltage amplifier 46in accordance with the magnitude and direction of the deviation ofoutput terminal 30 from signal ground. As a result of the modificationof the hard conduction of cathode follower 47 and the correspondingmodification of the voltage level of its cathode, the conduction ofisolating diode 45 is varied in a manner so as to tend to drive thevoltage level of output terminal 30 toward signal ground. Likewise, thevariation of the conduction of voltage amplifier 46 will modify thevoltage level of its plate and output terminal 30. Whenever isolatingdiode 45 acts to raise the voltage level of the output terminal 30,voltage amplifier 46 will also aid in raising the voltage level thereof.Similarly, when isolation diode 45 acts to lower the voltage level ofoutput terminal 30, voltage amplifier 46 will also aid in lowering thevoltage level thereof. Thus, isolation diode 45 and voltage amplifier 46coact to bidirectionally alter the Voltage level of output terminal 30such that it will tend to be equal to signal ground.

On the other hand, if it is desired that the electronic switch act inits open switch mode of operation, voltage amplifier 4t) and cathodefollower 47 may be switched to their other stable condition. Manytechniques are known to those skilled in the art for switching thebisatble multivibrator from one state to another. By way of example, anegative spike may be applied to the control grid of cathode follower47, thereby driving it from a slightly positive voltage level to anegative voltage level in the direction of the negative DC. supplyvoltage being applied to the cathode load resistor 56. The level ofconduction of cathode follower 47 then decreases and the cathode thereofgoes negative. When the voltage level of the cathode of cathode follower47 goes negative, steering diodes 54 and 55 will be forwardly biased,thereby causing the cathodes of voltage amplifiers 4t) and 37 to followthe level of the cathode of cathode follower 47. Steering diodes 38 and43 will then be reversely biased. As a result, voltage amplifiers 40 and37 are effectively driven to :a hard conducting condition (saturation)so that the voltage level of their plates will fall away from thepositive D.C. supply voltages, thereby decreasing the positive voltagebeing applied to the control grid of cathode follower 47 and voltageamplifier 46.

This action drives the cathode voltage level of cathode follower 47still further negative and voltage amplifier 40 further into saturationin a regenerative manner. This action is effective to hold voltageamplifier 40 and cathode follower 47 in the bistable conditioncorresponding to the open switch mode of operation. The voltage level ofthe plate of isolating diode 45 then goes below the voltage level of itscathode, thereby cutting off isolating diode 45. In addition, voltageamplifier 46 is driven to a non-conducting condition as a result of thedecreased positive going voltage being applied to its control grid, andoutput terminal 30 is totally isolated. It will be noted that the outputterminal 30 sees a very high impedance in the input of cathode follower31. As indicated hereinabove, when steering diodes 54 and 55 areforwardly biased by the negative voltage level of the cathode of cathodefollower 47, steering diodes 43 and 38 are reversely biased, therebyisolating voltage amplifiers 40 and 37 from cathode followers 32 and 31.As a result of the isolation of output terminal 30 during the bistablecondition corresponding to the open switch mode of operation, it tendsto present a very high impedance approaching infinity to any circuit towhich it is connected. Similarly, a positive pulse may be applied to thecontrol grid for driving cathode follower 47 from a state of lowconduction to a state of high conduction (from an open switch mode tothe closed switch mode). As shown in FIG. 3, these positive and negativepulses may be derived when desired by applying a rectangular waveform toa conventional differentiating means 57. Differentiating means 57 may,by way of example, comprise a conventional resistance and capacitancedifferentiating circuit.

Thus, a bistable electronic switch embodying the teachings of thepresent invention and illustrated in FIG. 3 may be substituted for eachof the switches shown in the digital-to-analog converter systemillustrated in FIG. 1 to provide very high accuracy by reason of thefact that each common junction of the summing resistors of each parallelresistance path may alternately present very high or elfectivelyinfinite impedance to signal ground when it is desired to isolate thecommon junction from ground, or present a very low resistance equal toRe 1A between each common junction and signal ground when it is desiredto ground each common junction. It should be clear that terminal 30 ofFIG. 3, hereinabove referred to as output terminal 30, would beconnected to the common junction and signal ground would correspond tothe signal reference source. R may be thought of as equal to a functionof the internal impedance of voltage amplifier 46, isolation diode 45',cathode follower 47 and cathode load resistor 56. Moreover, A may beconsidered as representing the net gain of the total push-pull voltageregulation system for output terminal 30.

As set forth hereinabove, the bistable electronic switch of FIG. 3 may,by way of example, be switched from one state corresponding to the hardconduction of cathode follower 47 to the other state corresponding to avery low conduction (from a closed switch mode to an open switch mode)in cathode follower 47 by a negative pulse being applied to the controlgrid of that tube.

Although one bistable electronic switch incorporating the features ofthe present invention, such as that shown in FIG. 3, must be utilizedfor each of the switches 4 of FIG. 1 to provide the new and improveddigital-to-analog conversion, considerable economy may be made byincluding cathode followers 31 and 32 in one tube envelope and byincluding voltage amplifiers 37 and 40 in one tube envelope. Inaddition, cathode follower 47, isolating diode 45 and voltage amplifier46 each may be included in an envelope with the corresponding tube of anadjacent parallel resistance path.

While the present invention has been described as utilizing vacuumtubes, it should be understood that semiconductor type devices may wellbe substituted by those skilled in the art without departing from theteachings of the present device. Moveover, it should be understood thatin considering the operation of the improved electronic switch means,the terms resistance and impedance may be considered to beinterchangeable.

While there have been shown and described and pointed out thefundamental novel features of the invention as applied to a preferredembodiment, it will be understood that various omissions andsubstitutions and changes in the form and details of the deviceillustrated and in its operation may be made by those skilled in theart, without departing from the spirit of the invention. It is theintention, therefore, to be limited only as indicated by the scope ofthe following claims.

What is claimed is:

1. A digital-to-analog converter for converting a value expressed in adigital code having plural orders of significance into an analog signal,comprising a first summing amplifier, a reference voltage signal, pluralparallel impedance paths for applying said reference voltage signal tosaid first summing amplifier, the number of parallel impedance pathscorresponding to the number of orders of significance used to define thedigital information to be converted, the impedance of each of saidparallel paths being weighted in accordance With the digital code beingused, a bistable electronic switch associated with each parallel pathhaving a closed and open switch mode of operation, each of said bistableelectronic switches being connected its corresponding parallel path andground so that it may alternately ground or isolate said parallel pathfrom signal ground in accordance with the instantaneous digitalinformation to be converted, said bistable electronic switch presentinga very low impedance between its corresponding parallel impedance pathand signal ground during the closed switch mode and a very highimpedance between its corresponding parallel with and signal groundduring the open switch mode, a second summing amplifier providing saidreference voltage signal at its output, said second summing amplifierhaving first and second input summing resistors, an input referencevoltage source, said first input summing resistor being connecteddirectly to said input reference voltage source, a third summingamplifier, said second input summing resistor being connected to saidinput reference voltage source through said third summing amplifier, abistable electronic switch connected between said second input summingresistor and ground to alternately isolate or ground said second inputsumrning resistor to control the polarity or phase of the referencevoltage signal provided by said second summing amplifier.

2. The digit-al-to-analog converter as set forth in claim 1 wherein eachsaid bistable electronic switch comprises an output terminal connectedto the impedance path or resistor to be grounded or isolated, adilferential amplifier comprising a first cathode follower having a gridconnected to said output terminal, a second cathode follower having agrid connected to said ground, a first voltage amplifier connected tosample the voltage output of said first and second cathode followers forproviding an output voltage commensurate with the difference of theoutput voltage of said first cathode follower with respect to the outputvoltage of said second cathode follower, a second voltage amplifierconnected to sample the voltage output of said first and second cathodefollower for providing an output voltage commensurate with thedifference of the output voltage of said sec-0nd cathode follower withrespect to the output voltage of said first cathode follower, a thirdcathode follower and a third voltage amplifier, each having a plate gridand cathode, said grid of said third voltage amplifier being connectedto receive the output voltage from said first voltage amplifier, saidgrid of said third cathode follower being connected to receive theoutput voltage from said second voltage amplifier, said second cathodefollower and said third voltage amplifier being electrically arranged tocooperatively tend to drive said output terminal to a voltage equal tosaid ground.

References Cited by the Examiner UNITED STATES PATENTS 2,947,971 8/ 1960Glauberman 340347 MALCOLM A. MORRISON, Primary Examiner.

STEPHEN W. CAPELLI, Examiner.

UNITED STATES PATENT OFFICE CERTIFICATE OF CORRECTION Patent No.3,239,831 March 8, 1966 Sherman G. Francisco It is hereby certified thaterror appears in the above numbered patent requiring correction and thatthe said Letters Patent should read as corrected below.

Column 9, line 15 after "connected" insert between line 22, for "with"read path Signed and sealed this 1st day of August 1967.

(SEAL) Attest:

EDWARD M. FLETCHER, JR. EDWARD J. BRENNER Attesting Officer Commissionerof Patents

1. A DIGITAL-TO-ANALOG CONVERTER FOR CONVERTING A VALUE EXPRESSED IN ADIGITAL CODE HAVING PLURAL ORDERS OF SIGNIFICANCE INTO AN ANALOG SIGNAL,COMPRISING A FIRST SUMMING AMPLIFIER, A REFERENCE VOLTAGE SIGNAL, PLURALPARALLEL IMPEDANCE PATHS FOR APPLYING SAID REFERENCE VOLTAGE SIGNAL TOSAID FIRST SUMMING AMPLIFIER, THE NUMBER OF PARALLEL IMPEDANCE PATHSCORRESPONDING TO THE NUMBER OF ORDERS OF SIGNIFICANCE USED TO DEFINE THEDIGITAL INFORMATION TO BE CONVERTED, THE IMPEDANCE OF EACH OF SAIDPARALLEL PATHS BEING WEIGHTED IN ACCORDANCE WITH THE DIGITAL CODE BEINGUSED, A BISTABLE ELECTRONIC SWITCH ASSOCIATED WITH EACH PARALLEL PATHHAVING A CLOSED AND OPEN SWITCH MODE OF OPERATION, EACH OF SAID BISTABLEELECTRONIC SWITCHES BEING CONNECTED ITS CORRESPONDING PARALLEL PATH ANDGROUND SO THAT IT MAY ALTERNATELY GROUND OR ISOLATE SAID PARALLEL PATHFROM SIGNAL GROUND IN ACCORDANCE WITH THE INSTANTANEOUS DIGITALINFORMATION TO BE CONVERTED, SAID BISTABLE ELECTRONIC SWITCH PRESENTINGA VERY LOW IMPEDANCE BETWEEN ITS